The aim of the course is to simulate, model and design analog, mixed-signal and RF blocks using Verilog AMS language. The course presents a rigorous and proven top-down design methodology. The course is extensively built around Verilog-AMS which enables top-down design for very large complex mixed-signal circuits.

Special emphasis has been given to noise analysis which is based on both Spectre RF simulations and verilog-AMS.

• Pitfalls of Spectre circuit simulation such as convergence and accuracy problems in DC and transient analysis, Small-signal ac and noise analysis
• A vigorous top-down design methodology with Verilog-AMS programming
• Verilog-AMS language reference
  • data types, signals, expressions, system functions & tasks, analog, discrete-event & mixed behavioral blocks
• Analog and Mixed-signal modeling
  • Basic circuit elements resistors, capacitors, inductors, inverter, D-flip flop, latch, logic gates modeling
  • More complex blocks comparator, opamp, random bit generator, sample & hold, periodic sampler, voltage controlled oscillator, PLL, ADC, DAC modeling
• Advanced analysis using Verilog-AMS and Cadence Spectre
  • Comparator metastability analysis and offset simulation
  • Switch-capacitor filters modeling & simulation
  • Test bench for differential circuits
  • Bit error rate in clock data recovery circuits
  • Noise simulation for Switch-capacitor circuits
  • Cyclo-stationary noise simulations for PLL based frequency synthesizers
  • Jitter modeling and phase noise simulation in PLL
  • Data converters non-ideal behavior modeling and simulation
• Script-based matlab and Cadence Spectre co-simulation environment

• Kenneth S. Kundert, Olaf Zinke "The Designer's guide to Verilog-AMS," ISBN: 1-4020-8044-1
• Per Lowenborg, "Mixed Signal Processing Systems,"