Department of Computer Engineering, UET Taxila

Chip Design Centre (CDC)

In order to achieve self reliance in electronics and develop indigenous electronics products, acquisition of IC technology is necessary. It is imperative that a comprehensive capacity building program is initiated. The Chip Design Center (CDC) of Computer Engineering Department of UET Taxila provides complete environment for design capture, physical layout and verification of digital, analog and mixed-signal integrated circuits. The Center is powered by EDA tools from Mentor Graphics USA on Linux and Windows based platforms. The software provides advanced set of features for floor planning, top level assembly, interactive routing, physical verification DRC/LVS, parasitic extraction, and efficient polygon editing. The design is converted to physical mask database in GDS-II format enabling to export out design to any leading foundry.

Chip design, Integrated circuit design, or IC design, is a subset of electronics engineering, encompassing the particular logic and circuit design techniques required to design integrated circuits, or ICs. ICs consist of miniaturized electronic components built into an electrical network on a monolithic semiconductor substrate by photolithography.

IC design can be divided into the broad categories of digital and analog IC design. Digital IC design is to produce components such as microprocessors, FPGAs, memories (RAM, ROM, and flash) and digital ASICs. Digital design focuses on logical correctness, maximizing circuit density, and placing circuits so that clock and timing signals are routed efficiently. Analog IC design also has specializations in power IC design and RF IC design. Analog IC design is used in the design of op-amps, linear regulators, phase locked loops, oscillators and active filters. Analog design is more concerned with the physics of the semiconductor devices such as gain, matching, power dissipation, and resistance. Fidelity of analog signal amplification and filtering is usually critical and as a result, analog ICs use larger area active devices than digital designs and are usually less dense in circuitry.

Modern ICs are enormously complicated. An average desktop computer chip, as of 2015, has over 1 billion transistors. The rules for what can and cannot be manufactured are also extremely complex. Common IC processes of 2015 have more than 500 rules. Furthermore, since the manufacturing process itself is not completely predictable, designers must account for its statistical nature. The complexity of modern IC design, as well as market pressure to produce designs rapidly, has led to the extensive use of automated design tools in the IC design process. In short, the design of an IC using EDA software is the design, test, and verification of the instructions that the IC is to carry out.

Facility

An advanced IC Design facility equipped with state-of-the-art IC Design Tools has been established. The Design Center provides complete environment for design capture, physical layout and verification of digital, analog and mixed signal integrated circuits. IC Design Tools from Cadence USA have been selected for IC nanometer design. Linux and Windows based platforms / workstations have been selected. Cadence tools are supported by the major foundries of the world. The software provides advanced set of features for physical layout, floor planning, top level assembly, interactive routing, physical verification DRC/LVS, parasitic extraction, and efficient polygon editing. The design is converted to physical mask database in GDS-II format enabling to export out design to any leading foundry.

Chip Design Centre (CDC), Computer Engineering Department, UET Taxila

Chip Design Centre (CDC)

Objectives

Facility