UET Taxila
http://www.uettaxila.edu.pk
Welcome
to the course website.
|
|
Course Management System - UET Taxila
COURSE DESCRIPTION This is an introduction to computer architecture and pipelined design. The course is based on the use of the Verilog HDL language to define and simulate architectural computer components and to investigate the behavior of typical processor and processor pipelines.
|
|
|
|
| |
|
|